The present invention relates to the characterization of shallow trench isolation structures. In particular, the invention provides a method which can distinguish between an outer edge current component and a normal current component associated with an array of shallow trench isolation structures.
Shallow trench isolation (STI) has become a common isolation method for deep submicron CMOS technologies and for some power devices. The shallow trench isolation process begins with a relatively shallow trench, which is first etched in a silicon (Si) substrate. This trench is refilled with an insulator material and the surface is planarized to complete the isolation structure. During fabrication, the shape of both the top and bottom corners of the trench are important for device performance. Sharp corners with a small bending radius or with faceting can cause high electric fields, high mechanical stress, and non uniform oxide thickness, resulting in a degradation of device performance and gate oxide integrity problems.
In addition, the etching process can result in shallow trench isolation regions within an array having different geometric shapes, in particular, the sidewalls of the trenches can be different. For instance, an adjacent trench formation or etching process, can influence the manner in which a given trench forms. This is especially true for STI regions located at the ends, or edges, of an array of STI regions and will be explained in detail later.
Prior art focused on trench corner characterization and developing process controls which are intended to minimize extreme bends in the shape of both the top and bottom corners of a trench. Models of trench shape and formation using experimental and numerical methods are available; concentrating on detection of sharp corners, extreme bends in trench sidewalls, and defects in the refill process. In addition, prior art modeled the shape of the trenches and the thickness of the oxide as accurately as possible. However, the prior art does not characterize differences between the shape of shallow trench isolation regions located on the edge of an STI array versus STI regions located in the center of an array. Prior art considered this issue as negligible, however as the industry proceeds with downward scaling of electronic devices, these differences need to be taken into account and characterized. This becomes apparent when considering the surface area of a transistor gate located adjacent to an STI region, where the STI region is located on an edge of an STI, and comparing it to the surface area of a transistor gate where the STI region is located within the center of such an array.
The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the invention. It is intended to neither identify key or critical elements of the invention, nor delineate the scope of the invention. Its primary purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention details an approach in which the properties of an STI array can be easily characterized, including differences between the edge regions and the isolation regions located in the center of an STI array. This approach takes advantage of an intrinsic current enhancement inherent from the STI regions located on the outer edges of an STI array. A numerical method is then employed, which can distinguish two current components and thus provides vital characteristics of the STI sidewall structure. This approach allows for easy identification of the different characteristics for an STI array.
To the accomplishment of the foregoing and related ends, the invention comprises the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative aspects and implementations of the invention. These are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.